NXP Semiconductors /LPC15xx /SYSCON /SYSAHBCLKCTRL1

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Interpret as SYSAHBCLKCTRL1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)MRT 0 (DISABLE)RIT 0 (DISABLE)SCT0 0 (DISABLE)SCT1 0 (DISABLE)SCT2 0 (DISABLE)SCT3 0 (DISABLE)SCTIPU 0 (DISABLE)CCAN 0RESERVED 0 (DISABLE)SPI0 0 (DISABLE)SPI1 0RESERVED 0 (DISABLE)I2C0 0 (DISABLE)I2C1 0RESERVED 0 (DISABLE)UART0 0 (DISABLE)UART1 0 (DISABLE)UART2 0RESERVED 0 (DISABLE)QEI 0RESERVED 0 (DISABLE)USB 0RESERVED

MRT=DISABLE, UART2=DISABLE, QEI=DISABLE, SCT0=DISABLE, I2C1=DISABLE, CCAN=DISABLE, I2C0=DISABLE, USB=DISABLE, UART1=DISABLE, SCTIPU=DISABLE, SCT3=DISABLE, SCT1=DISABLE, UART0=DISABLE, RIT=DISABLE, SPI0=DISABLE, SPI1=DISABLE, SCT2=DISABLE

Description

System clock control 1

Fields

MRT

Enables clock for multi-rate timer.

0 (DISABLE): Disable

1 (ENABLE): Enable

RIT

Enables clock for repetitive interrupt timer.

0 (DISABLE): Disable

1 (ENABLE): Enable

SCT0

Enables clock for SCT0.

0 (DISABLE): Disable

1 (ENABLE): Enable

SCT1

Enables clock for SCT1.

0 (DISABLE): Disable

1 (ENABLE): Enable

SCT2

Enables clock for SCT2.

0 (DISABLE): Disable

1 (ENABLE): Enable

SCT3

Enables clock for SCT3.

0 (DISABLE): Disable

1 (ENABLE): Enable

SCTIPU

Enables clock for SCTIPU.

0 (DISABLE): Disable

1 (ENABLE): Enable

CCAN

Enables clock for CCAN.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

SPI0

Enables clock for SPI0.

0 (DISABLE): Disable

1 (ENABLE): Enable

SPI1

Enables clock for SPI1.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

I2C0

Enables clock for I2C0.

0 (DISABLE): Disable

1 (ENABLE): Enable

I2C1

Enables clock for I2C1.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

UART0

Enables clock for USART0.

0 (DISABLE): Disable

1 (ENABLE): Enable

UART1

Enables clock for USART1.

0 (DISABLE): Disable

1 (ENABLE): Enable

UART2

Enables clock for USART2.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

QEI

Enables clock for QEI.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

USB

Enables clock for USB register interface.

0 (DISABLE): Disable

1 (ENABLE): Enable

RESERVED

Reserved

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